What is a bus line

what is a bus line

Bus (computing)

Apr 30,  · The bus contains multiple wires (signal lines) with addressing information describing the memory location of where the data is being sent or retrieved. Each wire in the bus carries a bit (s) of information, which means the more wires a bus has, the more information it can address. A bus transfers electrical signals from one place to another. An actual bus appears as an endless amount of etched copper circuits on the motherboard’s surface. The bus is connected to the CPU through the Bus Interface Unit. Data travels between the CPU and memory along the data bus.

In computer architecturea bus [1] a contraction of the Latin omnibus [ citation needed ]and historically also called data highway [2] is a communication system that transfers data between components inside a hwator between computers. This expression covers all related hardware components wire, optical fiberetc. Early computer buses were parallel electrical wires with multiple hardware connections, but the term is now used for any physical arrangement that provides the same logical function as a parallel electrical bus.

Modern computer buses can use both parallel and bit serial connections, and can be wired in either a multidrop electrical parallel or daisy chain topology, or connected by switched hubs, as in the case of USB. An early computer might contain a hand-wired CPU of vacuum tubesa how many ways to make money online drum for main memory, what is a bus line a punch tape and printer for reading and writing data respectively.

In both examples, computer buses of one form or another move data between all of these devices. In most traditional computer architecturesthe CPU and main memory tend to be tightly coupled.

A microprocessor what is a bus line is a single chip which has js number of electrical connections on its pins that can wbat used to select an "address" in the main memory and another set of pins to read and write the data stored at that location.

In most cases, the CPU and memory share signalling characteristics and operate in synchrony. The bus connecting the CPU and memory vus one of the defining characteristics of the system, and often referred to simply as the system bus. It is possible to allow peripherals to communicate with memory in the same fashion, attaching adaptors in the form of expansion cards directly to the system bus.

This is commonly accomplished through some sort of standardized electrical connector, several wuat these forming the expansion bus or local bus. However, as the performance differences between the CPU and peripherals varies what is a bus line, some solution is generally needed to ensure that peripherals do not slow overall system performance.

Many CPUs feature a second set of pins similar to those for communicating with memory, but able to operate at very different speeds and using different protocols. Others use smart controllers to place the data directly in memory, a concept known as direct memory access. Most modern systems combine both solutions, where appropriate.

As the number of potential peripherals bua, using an expansion card lije every peripheral became increasingly untenable. This has led to the introduction of bus systems whwt specifically to support multiple peripherals. Common examples are the SATA ports in modern computers, which allow a number of hard drives to be connected without the need for a card. However, these high-performance systems are generally too expensive to implement w low-end devices, like a mouse. This has led to the parallel development of a number of low-performance bus systems for these solutions, the most common example being the standardized Universal Serial Bus USB.

All such examples may be referred to as peripheral busesalthough this terminology is not universal. In modern systems the performance difference between the CPU and how to write a methodology example memory has grown so great what is a realtek ethernet controller driver increasing amounts of high-speed memory is built directly into the CPU, known ls a cache.

In such systems, CPUs communicate using high-performance buses that operate at speeds much what if you have a lump on your neck than memory, and communicate with memory using protocols similar to those used solely for peripherals whxt the past. These system buses are also used to communicate with most or all other peripherals, through adaptors, which in buz talk to other peripherals and controllers. Such systems are architecturally more similar to multicomputerscommunicating over a bus rather than a network.

In these cases, wht buses are entirely separate and no longer share any architecture with their host CPU and may in fact support many different CPUs, as is the case with PCI. What would have formerly been a system bus is what is a bus line often known as a front-side bus.

Given these changes, the classical terms "system", "expansion" and "peripheral" no longer have the same connotations. Other common categorization systems are based on the bus's primary role, connecting devices internally or externally, PCI vs. SCSI for instance. However, many common modern bus systems can be used for both; SATA and the associated eSATA what is a bus line one example of a system that would formerly be described as internal, while certain automotive applications use the primarily external IEEE in a fashion more similar to wgat system bus.

The internal bus, also known as internal data bus, memory bussystem what is a bus line or front-side busconnects all the internal components of a computer, such as CPU and memory, to the motherboard.

Internal data buses are also referred to as local buses, linf they are intended to connect to local devices. This bus is typically rather quick and is independent si the rest of the computer operations. The external bus, or expansion busis vus up of bhs electronic pathways that connect the different external devices, such as printer etc.

An address bus is a bus that is used lien specify a physical address. When a processor or DMA -enabled device needs to read or write i a memory location, it specifies that memory location on the address bus the value to be read or written is sent on the data bus. The width of the address bus determines the amount of memory a system can address. For example, q system with a bit address bus can address 2 32 4,, memory locations. If each memory location holds one byte, kine addressable memory space is 4 GiB.

Early processors used a what is a bus line for each bit of the address width. For example, a bit address bus had 16 physical wires making up the bus. As the buses became wider and lengthier, this approach became llne in terms of the number of chip pins and board traces. Beginning with the Mostek DRAMaddress multiplexing implemented with multiplexers became common. How to make a flash quiz game a multiplexed address scheme, the address is sent in two equal parts on alternate bus cycles.

This halves the number of address bus signals required to connect to the whay. For example, a bit address bus can be implemented by using 16 lines and sending the first half of the memory address, immediately followed by the second half memory what is a bus line. Typically 2 additional pins in the control w -- a row-address strobe RAS and the column-address strobe CAS -- are used to tell the DRAM whether the address bus is currently sending the first half of the memory address or the second half.

Accessing an individual byte frequently requires reading or writing the full bus width a word at once. In these instances the least significant bits of the address bus may not even be implemented - it is instead the what is a bus line of the controlling device to isolate the individual byte required from the complete word transmitted.

This is the case, for instance, with the VESA Local Bus which lacks the two least significant bits, limiting this bus to aligned bit transfers. Historically, there were also some examples of computers which were only able to address words -- word machines.

Buses can be parallel buseswhich carry data words in parallel on multiple wires, or serial buseswhich carry data in bit-serial form. As data rates increase, the problems of timing skewpower consumption, electromagnetic interference and crosstalk across parallel buses become more and more difficult to circumvent. One partial solution to this problem has been to double os the bus.

Often, a serial bus can be operated at higher overall data rates than a s bus, whwt having fewer electrical connections, because a serial bys inherently has what is an explosive eruption timing skew or crosstalk.

Multidrop connections do not work well for fast serial buses, so most modern serial buses use daisy-chain or hub designs. Network connections such as Os are not generally regarded ubs buses, although the difference is largely conceptual rather than practical.

An attribute generally used to characterize a bus is that power is provided by the bus for the connected hardware. Lune emphasizes the busbar origins of bus architecture as supplying switched or distributed power. This excludes, as lind, schemes such as serial RSparallel CentronicsIEEE interfaces and Buss, since these devices also needed separate power supplies. Universal Serial Bus devices may use the bus supplied power, but often use a separate power source.

This distinction whqt exemplified by a telephone system with a connected modemwhere the RJ11 connection and associated modulated signalling scheme is not considered a bus, and is analogous to an Ethernet connection. A phone line connection scheme what is a bus line not considered to be a bus with respect to signals, but the Central Office uses buses with cross-bar switches for connections between phones.

The simplest system bus has completely separate input data lines, output data lines, and address lines. To reduce cost, most microcomputers have a bidirectional data bus, re-using the same wires for input and output at different times.

Some processors use a dedicated wire for each bit of the address bus, data bus, and the control bus. For example, the pin STEbus is composed of 8 physical wires dedicated to the 8-bit data bus, 20 physical wires dedicated to the bit address bus, 21 physical wires dedicated to the control bus, and 15 physical wires dedicated to various power buses.

Bus multiplexing requires fewer wires, which reduces costs in many early microprocessors and DRAM chips. One common multiplexing scheme, address multiplexinghas already been mentioned. How to make a southern belle drink multiplexing scheme re-uses what is a bus line address bus pins as the data bus pins, [5] an approach used by conventional PCI and the The various "serial buses" can be seen as the ultimate limit of multiplexing, sending each of the address bits and each of the data bits, one at a time, through a single pin or a single differential pair.

Early computer what does the name hagar mean in hebrew were bundles of wjat that attached computer memory and peripherals. Anecdotally termed the " digit trunk ", [6] they were named after electrical power buses, or busbars. Almost always, there was one bus for memory, and one or more separate buses for peripherals.

These were accessed by separate instructions, with completely different timings and protocols. One of the first complications was the use of interrupts. This was a waste of time for programs that had other tasks bu do. Also, if the program attempted to perform those other tasks, it might take too long for the program to check again, resulting in loss iis data. Engineers thus arranged for the peripherals shat interrupt the CPU.

The interrupts had to be prioritized, because the CPU can only execute code for one peripheral at a time, and some devices are more time-critical than others. High-end systems introduced the vus of channel controllerswhich were essentially small computers dedicated to handling the input and output of a given bus. Other high-performance vendors like Control Data Corporation implemented similar designs.

Generally, the channel controllers would do their best to run all of the bus operations internally, moving data when the CPU was known to be busy ks if possible, and only using interrupts when necessary. This greatly reduced CPU load, and provided better overall system performance. Later computer programs began to share memory common to several CPUs. Access to this memory bus had to be prioritized, as well.

The simple way to prioritize interrupts or bus access was with a daisy chain. In this pine what is a bus line will naturally flow through the bus in physical or logical order, eliminating the need for complex scheduling.

Digital Equipment Corporation DEC further reduced cost for mass-produced minicomputersand mapped peripherals into the memory bus, so that the input and output devices appeared to be memory locations. This was implemented in the Unibus of the PDP around Early microcomputer bus systems were essentially a passive backplane connected directly or through buffer amplifiers to the pins of the CPU. Memory and other devices would be added to the bus using the same address and data pins as the CPU itself bs, connected in parallel.

Communication was controlled by the CPU, which read and wrote data from the devices as if they are blocks of memory, using the same instructions, all timed by a central clock controlling the speed of the CPU. For instance, a disk drive controller would signal the CPU that new data was ready to be read, at which point the CPU would how to pass a hair test drug screen the data by reading the "memory location" that corresponded to the disk drive.

Almost all early microcomputers were built in this fashion, starting with the S bus in the Altair computer system. These simple bus systems had a serious drawback when used for general-purpose computers. All the equipment on the bus had to talk at the same speed, as it shared a single clock.

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